Joven Escares
Dasmariñas City
Summary
7 years of experience in Test Hardware Engineering and Failure Analysis. Expertise in Wafer Level and Final Testing, focusing on MTTR, MTBF, and OEE. Proficient in software debugging, root cause analysis, implementing corrective actions, and effective teamwork.
Overview
7
7
years of professional experience
Work History
Test Hardware Engineer
Analog Devices Inc.
05.2019 - Current
- Experienced Test Hardware Engineer specializing in Wafer Level Testing and Final Testing, skilled in achieving metrics like MTTR, MTBF, and OEE through precise probe alignment using PLUM5, PLUM10, and P-8XL, operating various test systems (RASCO, ISMECA, GRAVITY, and PICK-and-PLACE), conducting E8D failure analysis, and independently setting up and calibrating test equipment for accurate data collection.
Failure Analysis Technician
Artesyn Embedded Technologies
08.2017 - 05.2019
- Detail-oriented Failure Analysis Technician skilled in evaluating power supply compliance, conducting buyoff evaluations, diagnosing failures, performing repairs, and collaborating with engineers to enhance reliability.
Education
Bachelor of Science - Electronics Engineer
Lyceum of The Philippines University Cavite
General Trias, Cavite04.2017
Skills
- BoM, Schematic, TestMethod, Datasheet
- NI Labview, NI Multism, Allegro Cadence
- Linux/Unix/VBA/C/LTX Programming
- Debugging Hardware and Software,
- Oscilloscope, Digital Multimeter, CurveTracer
- P-8XL, PLUM5, and PLUM10
- RASCO, ISMECA, GRAVITY, and PCK&PLACE
Information
- Age: 30
- Date of Birth: 04/04/94
- Gender: Male
- Nationality: Filipino
- Marital Status: Single
- Religion: Catholic
Languages
English
Bilingual or Proficient (C2)
TAGALOG/FILIPINO
Bilingual or Proficient (C2)
Accomplishments
GOLD EXCELLENCE AWARD (October 11, 2024)
As a Leader Presenter of the TQM Plus for the cost saving of 211k$.
GOLD EXCELLENCE AWARD (October 10, 2024)
As a Team Accountable of the TQM PLUS with Cost Saving of 140k$.
APPLAUSE AWARD (June 2024)
For the Resolution of LT1970 LTX Probe Part causing low yield on process wafer.
References
- Engineer. Leah Q. Santos, Faculty Member, LPU Cavite, Cavite, Cavite, 09499072357
- Engineer. Brian James Punzalan, Manager, Analog Devices Inc., Philippines, +639198070985
- Engineer. Manuel Jugo, Associate Engineer, JCET Group, Singapore, +6581898124
Timeline
Test Hardware Engineer
Analog Devices Inc.
05.2019 - Current
Failure Analysis Technician
Artesyn Embedded Technologies
08.2017 - 05.2019
Bachelor of Science - Electronics Engineer
Lyceum of The Philippines University Cavite
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